The design of the 96-core MALT-Cv1 processor’s front end has been completed
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- Published: Wednesday, 18 January 2017 20:00
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Photo: TSMC |
The design of the first-generation 96-core processor’s front end has been completed for VLSI manufacturing at TSMC 28nm HPC+ factory (Taiwan). The basis is intended for high-performance integrated circuit development (high-performance computing, HPC). The designed processor belongs to MALT-C family. It contains 9 general-purpose RISC cores and 96 SIMD processor elements. Estimated chip area 12 mm2, power consumption 1,2 W at the frequency 0,8 GHz. Estimated date of sample delivery: January, 2018.
The project may be adapted for Russian factories on customer request in short time with relevant characteristics conversion. Multi-threaded processors based on MALT architecture will enable to significantly increase the performance and energy efficiency for stream encryption tasks, operations with large graph structures and speeding up SQL and NoSQL operations SQL in comparison with universal processors and FPGA.
