Debugging sets

A new device development doesn’t usually start with purchasing a specialized processor and designing your own board. It starts with testing target algorithms and tasks on a breadboard or prototype. All MALT families have implementations on FPGA, supplied with fast external DDR2/3/4 memory and with the common set of high speed interfaces Eth/PCIe/SATA. In terms of collaboration we offer you fully functional prototypes of MALT-C or MALT-D which enable you to debug your software in a real environment and give you a clear picture of how the completed device will look like and what features it will have in the future.

For debugging tools we use popular solutions based on FPGA Xilinx with original firmware developed by us. Such boards are available on the market, reliable and well known to developers. The approach has two key advantages in comparison to debugging tools based on specialized VLSI - lower price and reasonable delivery time. We try to constantly maintain the presented debugging sets in stock.

Feel free to contact us to get the MALT debugging set!

Debugging board for MALT processor

The debugging set is designed on Xilinx Kintex7 FPGA with implemented MALT-Cv2 prototype and intended to learn the processor’s hardware and software, to debug system and applied software and to prototype target devices. The FPGA offers the user 4 universal processing cores operating at a frequency of 75 MHz and 8 specialized computing cores operating at a frequency of 50 Mhz. All types of MALT-Cv2 peripheral interfaces are implemented including Ethernet. There's an additional interface FPGA Artix7 that implements extra Ethernet, PCIe Gen2, DDR3 interfaces. Also, MII/RGMII Ethernet switch is available.The module size is 150x275 mm.

MALT-D prototype on Digilent Genesys 2

The set is based on FPGA Xilinx XC7K325T-2FFG900C. It offers the user 29 universal processing cores combined into 5 lines. Four lines have 7 service cores and one line has a control core. The cores operate at a frequency of 100 MHz, the communication bus - 200 MHz, the memory controller - 100 MHz. External memory DDR3 at a frequency of 800 MHz and interfaces Eth, PCIe, COM, JTAG are available.

MALT-D prototype on ROSTA RB-8

The set is based on FPGA Xilinx XC7V585T-1FFG1761C. It offers the user 80 universal processing cores combined into 9 lines. Eight lines have 10 cores and one line has a control core. The cores operate at a frequency of 100 MHz, the communication bus - 200 MHz, the memory controller - 100 MHz. The external memory is 64 Mb RLDRAMIII at a frequency of 500 MHz. The interface PCIe Gen2 is available.